Sr. Staff Product Development Engineer - Test Methodology Engineer
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
Tenstorrent is seeking a Sr. Staff Test Methodology Engineer to help build the next generation of AI silicon and platforms, they will we need a to own the tools, systems, and processes that make our product and test engineers successful. The role will work across DFT, systems, software, and architecture to define how we bring up, validate, and scale high-volume production test for advanced AI devices.
This role is hybrid, based out of Santa Clara, CA or Austin, TX.
We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Who You Are
- A senior semiconductor test engineering leader with 15 years experience, who has built and scaled ATE-based production test for complex SoCs.
- Hands-on with Teradyne (UltraFlex/J750) and/or Advantest V93K and comfortable defining tester and handler strategies, not just using existing ones.
- Fluent with revision control and CI/CD (gitlab, github, Bitbucket, pipelines) and passionate about robust, automated infrastructure.
- Comfortable collaborating across DFT, systems, software, and architecture, and with OSAT partners, to drive low test-escape rates and high yield.
- A systems thinker who understands probe card/load board design considerations, fuse/eFuse programming, and production data analysis.
- A scripting-oriented engineer (Python, Perl, or TCL) who drives automation and efficiency across test flows and infrastructure.
- Curious about next-generation advanced packaging (2.5D, chiplets) and how it changes test methodology.
What We Need
- BS/MS in EE/ECE/CE with 15 years in semiconductor test engineering with hands-on experience with Teradyne UltraFlex/J750 and/or Advantest V93K.
- Ability to define and specify tester and handler roadmaps aligned to product and technology needs.
- Understanding of probe card and load board design and standardization.
- Ownership of test program revision control and release automation pipelines and experience with distributed revision control (gitlab, github, Bitbucket) and CI/CD for test content.
- Ability to architect ATE data flows from tester into yield management and analytics systems; familiarity with STDF and production data systems.
- Experience with pattern formats (STIL, WGL) and developing/maintaining pattern conversion flows to ATE-native formats.
- Proven experience with fuse/eFuse programming methodology, repair flows, and defining fuse map methodology across teams and fusing steps.
Ability to define methodology documentation and training for global test teams. - Experience supporting high-volume manufacturing at OSATs, including silicon bring-up and production ramp.
- Demonstrated ability to drive automation and efficiency improvements across test infrastructure using Python/Perl/TCL.
What You Will Learn
- How to shape the end-to-end test infrastructure for Tenstorrent’s AI SoCs—from initial silicon bring-up through high-volume OSAT production.
- How to architect scalable ATE data pipelines into modern yield management and analytics environments, influencing data-driven debug and optimization.
Best practices for fuse map methodology, repair strategies, and test content flows across multiple product lines and technology nodes. - How advanced 2.5D and chiplet-based packaging affects test strategy, pattern design, hardware standards, and overall product quality.
- How to mentor and enable global test and product engineering teams through robust methodologies, tooling, documentation, and training.
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
This position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a U.S. EAR Country Groups D:1, E1, or E2 country.
This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.